VSD - Static Timing Analysis - I

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VSD - Static Timing Analysis - I provided by Udemy is a comprehensive online course, which lasts for 3-4 hours worth of material. VSD - Static Timing Analysis - I is taught by Kunal Ghosh. Upon completion of the course, you can receive an e-certificate from Udemy. The course is taught in Englishand is Paid Course. Visit the course page at Udemy for detailed price information.

Overview
  • VLSI - Essential timing checks

    What you'll learn:

    • Understand various STA checks for timing closure
    • Able to do a quality analysis for real designs
    • Know-how on how real STA works in industries, something which you will not find in any books
    • Step-by-step and structured timing analysis

    Static timing analysis comprises broadly for timing checks, constraints and library. Having all of them in a single course makes it bulky. So we decided to have it in 3 parts and this is part I - Essential timing checks. This course will give an eagle's eye to every timing check that is being performed in current industries for sign-off. This will also introduce you to basic terminologies for timing, which are needed for advanced courses on STA.

    Timing comes at every step of physical design flow, but in this course, we primarily focus on signoff timing i.e. looking into each and every corner of design for any timing violations

    The course starts from very basic and gradually takes you to an advanced level at an intermediate pace. So no questions on you missing any details

    Hope you enjoy learning this course in the same way we enjoyed making them.

    Happy Learning !!