Overview
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About the Course:The course will introduce students to the topics of Digital CMOS VLSI subsystem design using design metrics of delay, power, and area in detail. The course focuses more on power estimation, and interconnect aware designs and discusses on few power benefits designs. Approximate computing datapath subsystem designs will be analyzed along with the design, and error metrics. Different forms of standard cell design of latch, and flipflops will be discussed and the importance of timing parameters in sequential circuits will explained.INTENDED AUDIENCE: Students interested in Digital VLSIPREREQUISITES: Digital Electronics at Undergraduate level.INDUSTRY SUPPORT: Samsung, Intel, Broadcom, Qualcomm, IBM
